Functional verification, in electronic design automation, is the task of verifying how the logic design adjusts to specification. Throughout everyday terms, functional verification endeavors to answer the actual question “Does this specific proposed design do what is intended?” This can be a complex task, and takes many time and effort generally in most large electronic process design projects. Functional verification is incredibly difficult due to sheer volume involving possible testcases which exist in even a easy design.
Functional Verification
